求助：关于USB的问题
/* here see um_s3c4510b.pdf 5-4 *//*
NON-CACHEABLE AREA CONTROL BIT
Although the cache affects the entire system memory, it is sometimes necessary to define non-cacheable areas
when the consistency of data stored in memory and the cache must be ensured. To support this, the S3C4510B
provides a non-cacheable area control bit in the address field, ADDR.
If ADDR in the ROM/SRAM, flash memory, DRAM, or external I/O bank's access address is "0", then the
accessed data is cacheable. If the ADDR value is "1", the accessed data is non-cacheable.
*/
/*
Special thanks to gongxufei <[email protected]> for this great contribution
*/
//for USB DATA and COMMAND, set addr = 1 so the accessed data is non-cacheable
#define D12_DATA0x07fd0000 //D12 use nECS0 as the chip selection
#define D12_COMMAND 0x07fd0001
1.代码注释中提到如果ADDR ＝ 1，那么访问数据时就是非缓冲方式，请问ADDR是什么？
2.D12_DATA 和D12_COMMAND 的地址是怎么确定的？（没有看到相关寄存器的设置） ADDR 就是 地址0x07fd0000的第 26 bit ， 也就是 0x07fd 中 7(0x111) 的第一个1 bit。
这个地址的确定可以参考看一下
精华: Learn-lumit-Step-19 : 字符液晶显示实验
http://www.linuxfans.org/nuke/modules.php?name=Forums&file=viewtopic&t=132068&highlight=necs1
http://www.linuxfans.org/nuke/modules.php?name=Forums&file=viewtopic&t=130893&highlight=necs1
USB (nECS0): 0x03fd0000
LCD (nECS1): 0x03fd4000
NandFlash (nECS2): 0x03fd8000
每一个 extern IO Bank 长度是 0x4000 。
至于 0x7FD 和 0x3FD 的关系，可以看看 chw75 的帖子：
http://www.linuxfans.org/nuke/modules.php?name=Forums&file=viewtopic&p=4490082&highlight=#4490082
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