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 发表于 2005-9-2 14:27:37
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| USB  (nECS0):   0x03fd0000 LCD  (nECS1):   0x03fd4000
 NandFlash  (nECS2):  0x03fd8000
 每一个 extern IO Bank 长度是 0x4000 。
 至于 0x7FD 和 0x3FD 的关系,可以看看 chw75 的帖子:
 http://www.linuxfans.org/nuke/modules.php?name=Forums&file=viewtopic&p=4490082&highlight=#4490082
 
 在s3c4510的pdf上是这么讲的:
 NON-CACHEABLE AREA CONTROL BIT
 Although the cache affects the entire system memory, it is sometimes necessary to define non-cacheable areas
 when the consistency of data stored in memory and the cache must be ensured. To support this, the S3C4510B
 provides a non-cacheable area control bit in the address field, ADDR[26].
 If ADDR[26] in the ROM/SRAM, flash memory, DRAM, or external I/O bank's access address is "0", then the
 accessed data is cacheable. If the ADDR[26] value is "1", the accessed data is non-cacheable.
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