u-boot 的start.s中代码的不解

firstbread · 发表于 2006-6-17 14:37:44

我发现start.s中有很多语法的使用是错误的。比如说#include ,":"等的使用。
后来查阅资料知道start.s先要经过C编译的。因此，才可以使用#include 。
可是还是不知道为什么有用“：”的？
不解，我是新手，请赐教！

firstbread · 发表于 2006-6-17 14:56:37

arm的汇编语法中规定标号后面是不允许使用“：”的。可是这里使用了。
而且，我看到其它的汇编程序也有使用。这是为什么？

firstbread · 发表于 2006-6-17 15:21:20

start.s中甚至没有一个完整的段定义。
这是什么原因？？？请高手赐教啊！1

firstbread · 发表于 2006-6-17 15:23:16

#include <config.h>
#include <version.h>

/*
*************************************************************************
*
* Jump vector table as in table 3.1 in [1]
*
*************************************************************************
*/

.globl _start
_start: b    reset
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
ldr pc, _data_abort
ldr pc, _not_used
ldr pc, _irq
ldr pc, _fiq

_undefined_instruction: .word undefined_instruction
_software_interrupt: .word software_interrupt
_prefetch_abort: .word prefetch_abort
_data_abort: .word data_abort
_not_used: .word not_used
_irq: .word irq
_fiq: .word fiq

.balignl 16,0xdeadbeef

/*
*************************************************************************
*
* Startup Code (reset vector)
*
* do important init only if we don't start from memory!
* relocate armboot to ram
* setup stack
* jump to second stage
*
*************************************************************************
*/

_TEXT_BASE:
.word TEXT_BASE

.globl _armboot_start
_armboot_start:
.word _start

/*
* These are defined in the board-specific linker script.
*/
.globl _bss_start
_bss_start:
.word __bss_start

.globl _bss_end
_bss_end:
.word _end

#ifdef CONFIG_USE_IRQ
/* IRQ stack memory (calculated at run-time) */
.globl IRQ_STACK_START
IRQ_STACK_START:
.word 0x0badc0de

/* IRQ stack memory (calculated at run-time) */
.globl FIQ_STACK_START
FIQ_STACK_START:
.word 0x0badc0de
#endif

/*
* the actual reset code
*/

reset:
/*
   * set the cpu to SVC32 mode
   */
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0

/* turn off the watchdog */
#if defined(CONFIG_S3C2400)
# define pWTCON 0x15300000
# define INTMSK 0x14400008 /* Interupt-Controller base addresses */
# define CLKDIVN 0x14800014 /* clock divisor register */
#elif defined(CONFIG_S3C2410)
# define pWTCON 0x53000000
# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
# define INTSUBMSK 0x4A00001C
# define CLKDIVN 0x4C000014 /* clock divisor register */
#endif

#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
ldr    r0, =pWTCON
mov    r1, #0x0
str    r1, [r0]

/*
   * mask all IRQs by setting all bits in the INTMR - default
   */
mov r1, #0xffffffff
ldr r0, =INTMSK
str r1, [r0]
# if defined(CONFIG_S3C2410)
ldr r1, =0x3ff
ldr r0, =INTSUBMSK
str r1, [r0]
# endif

/* FCLK:HCLK

CLK = 1:2:4 */
/* default FCLK is 120 MHz ! */
ldr r0, =CLKDIVN
mov r1, #3
str r1, [r0]
#endif /* CONFIG_S3C2400 || CONFIG_S3C2410 */

/*
   * we do sys-critical inits only at reboot,
   * not when booting from ram!
   */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif

#ifndef CONFIG_SKIP_RELOCATE_UBOOT
relocate: /* relocate U-Boot to RAM       */
adr r0, _start /* r0 <- current position of code */
ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
cmp    r0, r1                /* don't reloc during debug       */
beq    stack_setup

ldr r2, _armboot_start
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot          */
add r2, r0, r2 /* r2 <- source end address       */

copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */

/* Set up the stack       */
stack_setup:
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
sub r0, r0, #CFG_MALLOC_LEN /* malloc area                   */
sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo                      */
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack */

clear_bss:
ldr r0, _bss_start /* find start of bss segment       */
ldr r1, _bss_end /* stop here                      */
mov r2, #0x00000000 /* clear                         */

clbss_l:str r2, [r0] /* clear loop...                   */
add r0, r0, #4
cmp r0, r1
ble clbss_l

#if 0
/* try doing this stuff after the relocation */
ldr    r0, =pWTCON
mov    r1, #0x0
str    r1, [r0]

/*
   * mask all IRQs by setting all bits in the INTMR - default
   */
mov r1, #0xffffffff
ldr r0, =INTMR
str r1, [r0]

/* FCLK:HCLK

CLK = 1:2:4 */
/* default FCLK is 120 MHz ! */
ldr r0, =CLKDIVN
mov r1, #3
str r1, [r0]
/* END stuff after relocation */
#endif

ldr pc, _start_armboot

_start_armboot: .word start_armboot

firstbread · 发表于 2006-6-17 15:23:34

#include <config.h>
#include <version.h>

/*
*************************************************************************
*
* Jump vector table as in table 3.1 in [1]
*
*************************************************************************
*/

.globl _start
_start: b    reset
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
ldr pc, _data_abort
ldr pc, _not_used
ldr pc, _irq
ldr pc, _fiq

_undefined_instruction: .word undefined_instruction
_software_interrupt: .word software_interrupt
_prefetch_abort: .word prefetch_abort
_data_abort: .word data_abort
_not_used: .word not_used
_irq: .word irq
_fiq: .word fiq

.balignl 16,0xdeadbeef

/*
*************************************************************************
*
* Startup Code (reset vector)
*
* do important init only if we don't start from memory!
* relocate armboot to ram
* setup stack
* jump to second stage
*
*************************************************************************
*/

_TEXT_BASE:
.word TEXT_BASE

.globl _armboot_start
_armboot_start:
.word _start

/*
* These are defined in the board-specific linker script.
*/
.globl _bss_start
_bss_start:
.word __bss_start

.globl _bss_end
_bss_end:
.word _end

#ifdef CONFIG_USE_IRQ
/* IRQ stack memory (calculated at run-time) */
.globl IRQ_STACK_START
IRQ_STACK_START:
.word 0x0badc0de

/* IRQ stack memory (calculated at run-time) */
.globl FIQ_STACK_START
FIQ_STACK_START:
.word 0x0badc0de
#endif

/*
* the actual reset code
*/

reset:
/*
   * set the cpu to SVC32 mode
   */
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0

/* turn off the watchdog */
#if defined(CONFIG_S3C2400)
# define pWTCON 0x15300000
# define INTMSK 0x14400008 /* Interupt-Controller base addresses */
# define CLKDIVN 0x14800014 /* clock divisor register */
#elif defined(CONFIG_S3C2410)
# define pWTCON 0x53000000
# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
# define INTSUBMSK 0x4A00001C
# define CLKDIVN 0x4C000014 /* clock divisor register */
#endif

#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
ldr    r0, =pWTCON
mov    r1, #0x0
str    r1, [r0]

/*
   * mask all IRQs by setting all bits in the INTMR - default
   */
mov r1, #0xffffffff
ldr r0, =INTMSK
str r1, [r0]
# if defined(CONFIG_S3C2410)
ldr r1, =0x3ff
ldr r0, =INTSUBMSK
str r1, [r0]
# endif

/* FCLK:HCLK

CLK = 1:2:4 */
/* default FCLK is 120 MHz ! */
ldr r0, =CLKDIVN
mov r1, #3
str r1, [r0]
#endif /* CONFIG_S3C2400 || CONFIG_S3C2410 */

/*
   * we do sys-critical inits only at reboot,
   * not when booting from ram!
   */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif

#ifndef CONFIG_SKIP_RELOCATE_UBOOT
relocate: /* relocate U-Boot to RAM       */
adr r0, _start /* r0 <- current position of code */
ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
cmp    r0, r1                /* don't reloc during debug       */
beq    stack_setup

ldr r2, _armboot_start
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot          */
add r2, r0, r2 /* r2 <- source end address       */

copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */

/* Set up the stack       */
stack_setup:
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
sub r0, r0, #CFG_MALLOC_LEN /* malloc area                   */
sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo                      */
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack */

clear_bss:
ldr r0, _bss_start /* find start of bss segment       */
ldr r1, _bss_end /* stop here                      */
mov r2, #0x00000000 /* clear                         */

clbss_l:str r2, [r0] /* clear loop...                   */
add r0, r0, #4
cmp r0, r1
ble clbss_l

#if 0
/* try doing this stuff after the relocation */
ldr    r0, =pWTCON
mov    r1, #0x0
str    r1, [r0]

/*
   * mask all IRQs by setting all bits in the INTMR - default
   */
mov r1, #0xffffffff
ldr r0, =INTMR
str r1, [r0]

/* FCLK:HCLK

CLK = 1:2:4 */
/* default FCLK is 120 MHz ! */
ldr r0, =CLKDIVN
mov r1, #3
str r1, [r0]
/* END stuff after relocation */
#endif

ldr pc, _start_armboot

_start_armboot: .word start_armboot

。。。。。。。。。
。。。。。。。。。。

xiao_in · 发表于 2006-6-18 15:00:04

我也有很多不解的地方，:-)

.word 是声明一个变量、常量、还是别的什么？
它声明的东西是属于text、还是rodata、还是rwdata的？

.got段又是干什么用的

ldr pc, _start_armboot 中_start_armboot是什么性质的地址，相对地址还是绝对地址，这条语句是用来从flash跳到ram的，还是在别的地方已经跳到ram了？

>_<，好多不懂的，有谁能解答一下。

wayne55 · 发表于 2006-6-18 21:09:45

应该是start.S
注意这个“S”是大写，说明是GUN的汇编文件

通常程序文件须经过，编译－》汇编－》连接
GNU在编译阶段对汇编程序做了一些扩展

vmos · 发表于 2006-6-18 22:23:14

看看gnu汇编

firstbread · 发表于 2006-6-19 13:13:45

哦，原来是使用 gnu AT&T 格式汇编的语法格式
明白了
谢谢

xbzjackey · 发表于 2006-12-19 11:04:18

对阿，.s和.S有区别

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